c3dhall12i2c.h

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/****************************************************************************
** Copyright (C) 2020 MikroElektronika d.o.o.
** Contact: https://www.mikroe.com/contact
**
** Permission is hereby granted, free of charge, to any person obtaining a copy
** of this software and associated documentation files (the "Software"), to deal
** in the Software without restriction, including without limitation the rights
** to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
** copies of the Software, and to permit persons to whom the Software is
** furnished to do so, subject to the following conditions:
** The above copyright notice and this permission notice shall be
** included in all copies or substantial portions of the Software.
**
** THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
** EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
** OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
** IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM,
** DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT
** OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
**  USE OR OTHER DEALINGS IN THE SOFTWARE.
****************************************************************************/

 
#ifndef C3DHALL12I2C_H
#define C3DHALL12I2C_H
 
#ifdef __cplusplus
extern "C"{
#endif

#ifdef PREINIT_SUPPORTED
#include "preinit.h"
#endif
 
#ifdef MikroCCoreVersion
    #if MikroCCoreVersion >= 1
        #include "delays.h"
    #endif
#endif
 
#include "drv_digital_out.h"
#include "drv_digital_in.h"
#include "drv_i2c_master.h"




#define C3DHALL12I2C_REG_NOP                            0x00
#define C3DHALL12I2C_REG_INDIRECT_WR_ADDRESS            0x02
#define C3DHALL12I2C_REG_INDIRECT_WR_DATA_MSB           0x04
#define C3DHALL12I2C_REG_INDIRECT_WR_DATA_LSB           0x06
#define C3DHALL12I2C_REG_INDIRECT_WR_STATUS             0x08
#define C3DHALL12I2C_REG_INDIRECT_RD_ADDRESS            0x0A
#define C3DHALL12I2C_REG_INDIRECT_RD_STATUS             0x0C
#define C3DHALL12I2C_REG_INDIRECT_RD_DATA_MSB           0x0E
#define C3DHALL12I2C_REG_INDIRECT_RD_DATA_LSB           0x10
#define C3DHALL12I2C_REG_I2C_LOOP_BACK                  0x12
#define C3DHALL12I2C_REG_I2C_X_Y_8B                     0x14
#define C3DHALL12I2C_REG_I2C_T_Z_8B                     0x16
#define C3DHALL12I2C_REG_I2C_ANGLE_RADIUSSQ_8B          0x18
#define C3DHALL12I2C_REG_I2C_SIN_COS_8B                 0x1A
#define C3DHALL12I2C_REG_TEMPERATURE                    0x1C
#define C3DHALL12I2C_REG_X_CHANNEL                      0x1E
#define C3DHALL12I2C_REG_Y_CHANNEL                      0x20
#define C3DHALL12I2C_REG_Z_CHANNEL                      0x22
#define C3DHALL12I2C_REG_ANGLE                          0x24
#define C3DHALL12I2C_REG_RADIUS                         0x26
#define C3DHALL12I2C_REG_SINE                           0x28
#define C3DHALL12I2C_REG_COSINE                         0x2A
#define C3DHALL12I2C_REG_X_RAW_FILT_OUT                 0x2C
#define C3DHALL12I2C_REG_Y_RAW_FILT_OUT                 0x2E
#define C3DHALL12I2C_REG_Z_RAW_FILT_OUT                 0x30
#define C3DHALL12I2C_REG_CTRL1                          0x32
#define C3DHALL12I2C_REG_I2C_LOOPB_CONF                 0x34
#define C3DHALL12I2C_REG_CTRL2                          0x36
#define C3DHALL12I2C_REG_CTRL3                          0x38
#define C3DHALL12I2C_REG_CTRL4                          0x3A
#define C3DHALL12I2C_REG_RESERVED                       0x3C
#define C3DHALL12I2C_REG_ACCESS_KEY                     0x3E
 // c3dhall12i2c_reg



#define C3DHALL12I2C_CTRL1_START_SAMPLE_CLEAR           0x0000
#define C3DHALL12I2C_CTRL1_START_SAMPLE_SET             0x1000
#define C3DHALL12I2C_CTRL1_START_SAMPLE_MASK            0x1000
#define C3DHALL12I2C_CTRL1_INTERRUPT_FLAG_CLEAR         0x0000
#define C3DHALL12I2C_CTRL1_INTERRUPT_FLAG_SET           0x0800
#define C3DHALL12I2C_CTRL1_INTERRUPT_FLAG_MASK          0x0800
#define C3DHALL12I2C_CTRL1_STATUS_READY_CLEAR           0x0000
#define C3DHALL12I2C_CTRL1_STATUS_READY_SET             0x0400
#define C3DHALL12I2C_CTRL1_STATUS_READY_MASK            0x0400
#define C3DHALL12I2C_CTRL1_SLEEP_CNT_0_68_MS            0x0000
#define C3DHALL12I2C_CTRL1_SLEEP_CNT_1_36_MS            0x0010
#define C3DHALL12I2C_CTRL1_SLEEP_CNT_6_82_MS            0x0020
#define C3DHALL12I2C_CTRL1_SLEEP_CNT_13_64_MS           0x0030
#define C3DHALL12I2C_CTRL1_SLEEP_CNT_68_18_MS           0x0040
#define C3DHALL12I2C_CTRL1_SLEEP_CNT_136_36_MS          0x0050
#define C3DHALL12I2C_CTRL1_SLEEP_CNT_681_82_MS          0x0060
#define C3DHALL12I2C_CTRL1_SLEEP_CNT_1363_64_MS         0x0070
#define C3DHALL12I2C_CTRL1_SLEEP_CNT_MASK               0x0070
#define C3DHALL12I2C_CTRL1_OP_MODE_ACTIVE               0x0000
#define C3DHALL12I2C_CTRL1_OP_MODE_ACTIVE_INT           0x0002
#define C3DHALL12I2C_CTRL1_OP_MODE_ACTIVE_SAM           0x0004
#define C3DHALL12I2C_CTRL1_OP_MODE_SLEEP                0x0006
#define C3DHALL12I2C_CTRL1_OP_MODE_SLEEP_SAM            0x0008
#define C3DHALL12I2C_CTRL1_OP_MODE_LPDCM_INT            0x000A
#define C3DHALL12I2C_CTRL1_OP_MODE_LPDCM                0x000C
#define C3DHALL12I2C_CTRL1_OP_MODE_MASK                 0x000E

#define C3DHALL12I2C_CTRL2_INT_THR_MSB_DIR_MASK         0x0F00
#define C3DHALL12I2C_CTRL2_INT_THR_LSB_DIR_MASK         0x00FF

#define C3DHALL12I2C_CTRL3_AFE_CHAN_DIS_Z_DIR_EN        0x0000
#define C3DHALL12I2C_CTRL3_AFE_CHAN_DIS_Z_DIR_DIS       0x2000
#define C3DHALL12I2C_CTRL3_AFE_CHAN_DIS_Z_DIR_MASK      0x2000
#define C3DHALL12I2C_CTRL3_AFE_CHAN_DIS_Y_DIR_EN        0x0000
#define C3DHALL12I2C_CTRL3_AFE_CHAN_DIS_Y_DIR_DIS       0x1000
#define C3DHALL12I2C_CTRL3_AFE_CHAN_DIS_Y_DIR_MASK      0x1000
#define C3DHALL12I2C_CTRL3_AFE_CHAN_DIS_X_DIR_EN        0x0000
#define C3DHALL12I2C_CTRL3_AFE_CHAN_DIS_X_DIR_DIS       0x0800
#define C3DHALL12I2C_CTRL3_AFE_CHAN_DIS_X_DIR_MASK      0x0800
#define C3DHALL12I2C_CTRL3_POL_F_Z_DIR_NORMAL           0x0000
#define C3DHALL12I2C_CTRL3_POL_F_Z_DIR_INVERTED         0x0400
#define C3DHALL12I2C_CTRL3_POL_F_Z_DIR_MASK             0x0400
#define C3DHALL12I2C_CTRL3_POL_F_Y_DIR_NORMAL           0x0000
#define C3DHALL12I2C_CTRL3_POL_F_Y_DIR_INVERTED         0x0200
#define C3DHALL12I2C_CTRL3_POL_F_Y_DIR_MASK             0x0200
#define C3DHALL12I2C_CTRL3_POL_F_X_DIR_NORMAL           0x0000
#define C3DHALL12I2C_CTRL3_POL_F_X_DIR_INVERTED         0x0100
#define C3DHALL12I2C_CTRL3_POL_F_X_DIR_MASK             0x0100
#define C3DHALL12I2C_CTRL3_INT_SEL_DIR_X                0x0000
#define C3DHALL12I2C_CTRL3_INT_SEL_DIR_Y                0x0008
#define C3DHALL12I2C_CTRL3_INT_SEL_DIR_Z                0x0010
#define C3DHALL12I2C_CTRL3_INT_SEL_DIR_ABS_X            0x0018
#define C3DHALL12I2C_CTRL3_INT_SEL_DIR_ABS_Y            0x0020
#define C3DHALL12I2C_CTRL3_INT_SEL_DIR_ABS_Z            0x0028
#define C3DHALL12I2C_CTRL3_INT_SEL_DIR_TEMP             0x0030
#define C3DHALL12I2C_CTRL3_INT_SEL_DIR_ANGLE            0x0038
#define C3DHALL12I2C_CTRL3_INT_SEL_DIR_RADIUS           0x0040
#define C3DHALL12I2C_CTRL3_INT_SEL_DIR_NEW_SAMPLE       0x0048
#define C3DHALL12I2C_CTRL3_INT_SEL_DIR_MASK             0x0078
#define C3DHALL12I2C_CTRL3_INT_SIGN_DIR_LESS            0x0000
#define C3DHALL12I2C_CTRL3_INT_SIGN_DIR_GREATER         0x0004
#define C3DHALL12I2C_CTRL3_INT_SIGN_DIR_MASK            0x0004
#define C3DHALL12I2C_CTRL3_INT_FLAG_LATCH_DIR_DIS       0x0000
#define C3DHALL12I2C_CTRL3_INT_FLAG_LATCH_DIR_EN        0x0002
#define C3DHALL12I2C_CTRL3_INT_FLAG_LATCH_DIR_MASK      0x0002
#define C3DHALL12I2C_CTRL3_SAMPLE_INT_POL_DIR_LOW       0x0001
#define C3DHALL12I2C_CTRL3_SAMPLE_INT_POL_DIR_HIGH      0x0001
#define C3DHALL12I2C_CTRL3_SAMPLE_INT_POL_DIR_MASK      0x0001

#define C3DHALL12I2C_CTRL4_CIC_BW_SEL_LPM_DIR_195_5_HZ  0x0000
#define C3DHALL12I2C_CTRL4_CIC_BW_SEL_LPM_DIR_391_HZ    0x0100
#define C3DHALL12I2C_CTRL4_CIC_BW_SEL_LPM_DIR_782_HZ    0x0200
#define C3DHALL12I2C_CTRL4_CIC_BW_SEL_LPM_DIR_1564_HZ   0x0300
#define C3DHALL12I2C_CTRL4_CIC_BW_SEL_LPM_DIR_3128_HZ   0x0400
#define C3DHALL12I2C_CTRL4_CIC_BW_SEL_LPM_DIR_6256_HZ   0x0500
#define C3DHALL12I2C_CTRL4_CIC_BW_SEL_LPM_DIR_12512_HZ  0x0600
#define C3DHALL12I2C_CTRL4_CIC_BW_SEL_LPM_DIR_MASK      0x0700
#define C3DHALL12I2C_CTRL4_CIC_BW_SEL_DIR_195_5_HZ      0x0000
#define C3DHALL12I2C_CTRL4_CIC_BW_SEL_DIR_391_HZ        0x0010
#define C3DHALL12I2C_CTRL4_CIC_BW_SEL_DIR_782_HZ        0x0020
#define C3DHALL12I2C_CTRL4_CIC_BW_SEL_DIR_1564_HZ       0x0030
#define C3DHALL12I2C_CTRL4_CIC_BW_SEL_DIR_3128_HZ       0x0040
#define C3DHALL12I2C_CTRL4_CIC_BW_SEL_DIR_6256_HZ       0x0050
#define C3DHALL12I2C_CTRL4_CIC_BW_SEL_DIR_12512_HZ      0x0060
#define C3DHALL12I2C_CTRL4_CIC_BW_SEL_DIR_MASK          0x0070
#define C3DHALL12I2C_CTRL4_CORDIC_POL_DIR_NORMAL        0x0000
#define C3DHALL12I2C_CTRL4_CORDIC_POL_DIR_INVERTED      0x0008
#define C3DHALL12I2C_CTRL4_CORDIC_POL_DIR_MASK          0x0008
#define C3DHALL12I2C_CTRL4_CORDIC_SEL_DIR_COS_X_SINE_Y  0x0000
#define C3DHALL12I2C_CTRL4_CORDIC_SEL_DIR_COS_X_SINE_Z  0x0001
#define C3DHALL12I2C_CTRL4_CORDIC_SEL_DIR_COS_Y_SINE_Z  0x0002
#define C3DHALL12I2C_CTRL4_CORDIC_SEL_DIR_COS_Y_SINE_X  0x0003
#define C3DHALL12I2C_CTRL4_CORDIC_SEL_DIR_COS_Z_SINE_X  0x0004
#define C3DHALL12I2C_CTRL4_CORDIC_SEL_DIR_COS_Z_SINE_Y  0x0005
#define C3DHALL12I2C_CTRL4_CORDIC_SEL_DIR_MASK          0x0007

#define C3DHALL12I2C_TEMP_SIGN_BIT                      0x0800
#define C3DHALL12I2C_TEMP_SIGN_MASK                     0xF000
#define C3DHALL12I2C_TEMP_RES                           8.052
#define C3DHALL12I2C_TEMP_OFFSET                        25.0
#define C3DHALL12I2C_XYZ_SIGN_BIT                       0x4000
#define C3DHALL12I2C_XYZ_SIGN_MASK                      0x8000
#define C3DHALL12I2C_XYZ_RES_MT                         248.2
#define C3DHALL12I2C_ANGLE_RES_DEG                      0.0109863

#define C3DHALL12I2C_DEVICE_ADDRESS                     0x65
 // c3dhall12i2c_set



#define C3DHALL12I2C_MAP_MIKROBUS( cfg, mikrobus ) \
    cfg.scl = MIKROBUS( mikrobus, MIKROBUS_SCL ); \
    cfg.sda = MIKROBUS( mikrobus, MIKROBUS_SDA ); \
    cfg.sample = MIKROBUS( mikrobus, MIKROBUS_PWM ); \
    cfg.int_pin = MIKROBUS( mikrobus, MIKROBUS_INT )
 // c3dhall12i2c_map // c3dhall12i2c

typedef struct
{
    // Output pins
    digital_out_t sample;           
 
    // Input pins
    digital_in_t int_pin;           
 
    // Modules
    i2c_master_t i2c;               
 
    // I2C slave address
    uint8_t slave_address;          
 
} c3dhall12i2c_t;

typedef struct
{
    pin_name_t scl;                 
    pin_name_t sda;                 
 
    pin_name_t sample;              
    pin_name_t int_pin;             
 
    uint32_t   i2c_speed;           
    uint8_t    i2c_address;         
 
} c3dhall12i2c_cfg_t;

typedef struct
{
    float temperature;              
    float x;                        
    float y;                        
    float z;                        
    float angle;                    
    float magnitude;                
    
} c3dhall12i2c_data_t;

typedef enum
{
    C3DHALL12I2C_OK = 0,
    C3DHALL12I2C_ERROR = -1,
    C3DHALL12I2C_DATA_NOT_READY = -2
 
} c3dhall12i2c_return_value_t;


void c3dhall12i2c_cfg_setup ( c3dhall12i2c_cfg_t *cfg );

err_t c3dhall12i2c_init ( c3dhall12i2c_t *ctx, c3dhall12i2c_cfg_t *cfg );

err_t c3dhall12i2c_default_cfg ( c3dhall12i2c_t *ctx );

err_t c3dhall12i2c_write_reg ( c3dhall12i2c_t *ctx, uint8_t reg, uint16_t data_in );

err_t c3dhall12i2c_read_reg ( c3dhall12i2c_t *ctx, uint8_t reg, uint16_t *data_out );

void c3dhall12i2c_set_sample_pin ( c3dhall12i2c_t *ctx, uint8_t state );

uint8_t c3dhall12i2c_get_int_pin ( c3dhall12i2c_t *ctx );

void c3dhall12i2c_start_measurement ( c3dhall12i2c_t *ctx );

err_t c3dhall12i2c_read_data ( c3dhall12i2c_t *ctx, c3dhall12i2c_data_t *data_out );
 
#ifdef __cplusplus
}
#endif
#endif // C3DHALL12I2C_H
 // c3dhall12i2c
 
// ------------------------------------------------------------------------ END